FPGA and CPLD

A Field-Programmable Gate Array is a semiconductor device containing programmable logic components called "logic blocks", and programmable interconnects. Field programmable gate arrays combine the architecture of gate arrays with the programmability of Programmable Logic Devices (PLDs). Some of the FPGA real estate is occupied by vendor logic to implement the field programmability feature of the FPGA, and a large portion of the die area is for programmable routing. The number of gates typically available to the user varies from 3,000 to 10,000. An FPGA normally consists of several uncommitted logic blocks in which the design is to be encoded. The logic block consists of some universal gates.
Logic blocks can be programmed to perform the function of basic logic gates such as AND, NAND and XOR, and more complex combinational functions such as decoders, multiplexers (MUX), random-access memories, etc. The connectivity between blocks is programmed via different types of devices, SRAM (Static Random Access Memory) or ant fuse. Logic blocks and interconnects can be programmed by the customer or designer, after the FPGA is manufactured, to implement any logical function-hence the name "programmable”.
The historical roots of FPGAs are in Complex Programmable Logic Devices (CPLDs). CPLD logic gate densities range from the equivalent of several thousand to tens of thousands of logic gates, while FPGAs typically range from tens of thousands to several million. The primary differences between CPLDs and FPGAs are architectural. A CPLD has a somewhat restrictive structure consisting of one or more programmable sum-of-products logic arrays feeding a relatively small number of clocked registers. The result of this is less flexibility, with the advantage of more predictable timing delays and a higher logic-to-interconnect ratio. The FPGA architectures, on the other hand, are dominated by interconnect. This makes them far more flexible to design for.
FPGAs have the capability of partial re-configuration that lets one portion of the device be re-programmed while other portions continue running The Mitrion Virtual Processor from Mitrionics is an example of a reconfigurable soft processor that is implemented on FPGAs.